warnke_page_1
Smart Dust Mote Core Architecture Brett Warneke, Sunil Bhave C8252, Spring 2000: Project Report Berkeley Sensor and Actuator Center, 497…
warnke_page_2
Core Functionality Specification In order to allow us to make realistic tradeoffs, a particular application scenario was chosen to guide…
warnke_page_3
Timer value 1 Timer value 2 Timer Setup Mem 1. Setup Mem 2 Figure 3: Timer and associated setup memories: The timer allows multiple timer…
warnke_page_4
Timer value 1 Timer value 2 Setup Mem 1 Timer oO baer. Open control signals are driven by the setup memory | 2X PWR PWR 8 PWR Sensor ADC +…
warnke_page_5
Conclusion Since Smart Dust has very limited energy resources, our goal for this project was to minimize energy consumption through…